Alchip Demonstrates Cutting-Edge Process and Packaging Technology at TSMC Technology Symposiums

Alchip Technologies recently showcased their recent achievements and future direction at the TSMC 2024 North America Technology Symposium in Santa Clara, CA, and Workshop in Austin, TX. The focus of their exhibit was on advanced technology and chiplet design plans. Alchip is set to participate in TSMC NA Technology Workshops in Boston, MA, and Technology Symposiums in Europe, Taiwan, China, and Japan.

At their booth, Alchip highlighted their expertise in high-performance computing design within the ASIC industry. They discussed their success with complex projects, including full reticle size designs over 800mm² on cutting-edge FinFET technology. Alchip engineers also showcased their advanced package production capabilities, such as CoWoS® designs on advanced nodes, power levels exceeding 1000W, and packages larger than 70x80mm2 that are currently in production.

The company emphasized their strong industry partnerships, including their membership with TSMC Open Innovation Platform® (OIP) Value Chain Alliance (VCA) and 3DFabricTM Alliance. Alchip is known for providing silicon design and production services for system companies developing complex and high-volume ASICs and SoCs. They offer faster time-to-market and cost-effective solutions for SoC design across various process technologies.

Alchip Technologies was founded in 2003 and is headquartered in Taipei, Taiwan. They have established themselves as a high-performance ASIC leader through their expertise in 2.5D/3DIC design, CoWoS/chiplet design

By Samantha Johnson

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